Photovoltaic
Shading loss & hot-spot risk, multi-MPPT mismatch, LVRT ride-through, P-Q capability envelope, PV power quality, active anti-islanding detection, PV short-circuit contribution and the DC-side cable check.
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Not computed — press Run
no PV / BESS / inverter / genset in this topology
Not computed — press Run
Per-string irradiance/temperature model with bypass diodes; worst string and hot-spot risk class.
Not computed — press Run
Weakest-string working point; mismatch-only loss is separated from the availability loss.
Not computed — press Run
Ride-through verdict, required vs available reactive current at the given voltage dip.
Not computed — press Run
Available P/Q range of the inverter at the given working point, with the sign convention stated.
Not computed — press Run
Voltage unbalance and flicker at the point of connection; unknown when the phase/flicker input is missing.
Not computed — press Run
Inverter contribution (1.2–1.5×In) contrasted with the synchronous-machine equivalent used by the classic grading.
Not computed — press Run
AFD / power-perturbation estimate with the non-detection zone and detection time.
About PV & DC-side simulation
This page renders the PV and DC-side studies of the design engine, one card per study, each behind its own study switch: study.pvShading (shading loss and hot-spot risk - IEC 61853 irradiance-temperature model with a bypass-diode simplification, GB/T 18216 field-test practice), study.pvMismatch (per-string working point, IEC 62446), study.pvLvrt (GB/T 19964 ride-through profile and the reactive-current demand Iq >= 1.5 x (0.9 - U) x In), study.pvPqEnvelope (apparent-power circle P2 + Q2 <= Sn2), study.pvPowerQuality (short-term flicker Pst and voltage unbalance epsilon - GB/T 24337 / GB/T 15543), study.pvShortCircuit (inverter controlled current limit against the synchronous-machine equivalent - GB/T 19964 + IEC 60909) and study.pvActiveIsland (AFD frequency shift / power perturbation detection - GB/T 33593). The moved card adds the DC string cable check (R = 2 rho L / A, drop <= 2 %, 1.25 x design current).
PV is the boundary between the array and the grid, so the owner, the EPC and the utility reviewer ask the same questions: does the inverter ride through a voltage sag, how much current does it really send into a fault, what do shading and string mismatch cost in energy, and are the DC cables sized with margin? The page answers all of them for your scheme instead of applying one generic derating factor.
Input = scheme topology (PV capacity, string count, MPPT count, cable lengths) + run switches (solar 0-1.0) + the PV study switches. POST /api/design with the PV switch group; the orchestrator calls each module and returns study.pvShading / pvMismatch / pvLvrt / pvPqEnvelope / pvPowerQuality / pvShortCircuit / pvActiveIsland (the moved card uses study.pvdccable). Chain: irradiance G and cell temperature per string to P_theo = N x Pmax/1000 x (G/1000) x [1 + gamma x (T_cell - 25)] with bypass-diode simplification, summed over strings to give the loss percentage; the circle Q_max = +/- sqrt(Sn2 - P2) with pfMin = |P|/Sn gives the reactive headroom that the LVRT and voltage-drop checks reuse; the negative/positive sequence ratio gives epsilon. Linkage: more kWp or strings raise the DC current (1.25 x check), the loss table and the annual energy the economics page prices; a deeper sag or longer clearance time raises the reactive demand and the inverter rating, and changes the fault contribution the protection page coordinates against.
All PV studies are engine-side and lazy: each card sends its own request only when you press Run, and each keeps a per-scheme fingerprint cache. Missing input is reported, never filled with zeros.